Daniel S. Barclay
Reston, Virginia
dsb@smart.net
http://daniel.barclay.org/resume
OBJECTIVE:
Senior software developer position in a collaborative team environment creating leading-edge solutions using Java, XML, and Internet technologies.
SUMMARY:
Detail-oriented, Master's-level software analyst/developer with 5 1/2 years of Java, focused on J2EE enterprise web applications, XML, and other Internet formats and protocols, backed by 10 years of C with 2 years of C++, in product development in the electronic design automation industry.
TECHNICAL SKILLS:
| J2EE: | XML: | Software Design: | Databases: |
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| Other Java: | Unix/Linux: | Cross-Platform Development: | Configuration Management: |
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Other Tools: Rational Rose; WebLogic Server, Apache, Tomcat, JBuilder, Mercury LoadRunner
EDA/Hardware Description Languages: VHDL, Verilog; language specification, processing, and intermediate representation; event-driven simulation, code generation
EXPERIENCE:
| Fannie Mae; Herndon, VA | Contractor (via IQuest Solutions) | Sept. 2002 - Jan. 2003 |
Requirements Analysis and Business Object Modeling:
Analyzed business requirements for security-trading tracking and accounting system.
| Mercator Software, Inc.; Reston, VA | Lead Software Engineer | Jan. 2002 - July 2002 |
Enterprise Application Integration (EAI) Product Development:
Characterized legacy C/C++ version of application integration broker for re-development in Java:
| Digital Focus, Inc.; Herndon, VA | Software Architect | Dec. 1997 - Aug. 2001 |
Web Applications, J2EE, WebLogic Server:
Developed J2EE-based medical credentialing web application using servlets, JSPs, and EJBs. Reduced development effort by providing common functionality to other servlet developers:
Reverse-engineered security realm provider interface for J2EE reference implementation. Reduced WebLogic development licensing costs by enabling development on reference implementation of applications targeted for deployment on WebLogic Server.
Enhanced portability of commercial CRM product code from WebLogic Server by identifying code not compliant with J2EE specifications.
XML, XSLT:
Demonstrated XSLT-based web interface to SOAP-based financial calculation server:
Developed in-house XML knowledge; provided XML consultation:
Created Netscape bookmarks indexer with XSLT (personal project):
Corporate Development Environment and Methodology:
Created cross-platform development area template for J2EE-based web application projects; reduced project startup time and cost:
Contributed detailed coding standards; promoted JavaDoc linking features.
Harvested code for re-use library.
GUI Development:
Created document generator subsystem for commercial loan application. Allowed non-technical personnel to specify machine-generated documents:
Testing:
| Compass Design Automation; Columbia, MD | Staff Software Engineer | Jan. 1987 - Sept. 1997 |
Redesigned intermediate representation of VHDL hardware description language (HDL):
Designed intermediate representation of Verilog HDL. Documented with cross-linked HTML for easy cross-referencing.
Developed GUI for VHDL formal verification tool using Galaxy C++.
Architected and developed VHDL simulator construction kit product.
Architected and led team developing special-purpose object-oriented database system for storing compiled VHDL design descriptions:
Taught VHDL simulation language courses to end-user engineers.
EDUCATION:
M.S., Electrical Engineering; March 1987; Virginia Tech;
Blacksburg, VA.
Thesis: An Automatic Test Generation Method for Chip-Level Circuit
Descriptions.
B.S., Electrical Engineering w/Computer Science minor, Magna Cum Laude; June 1984; Virginia Tech; Blacksburg, VA.
PROFESSIONAL DEVELOPMENT:
Sun Certified Programmer for the Java 2 Platform, August 2001.
XML Certification Preparation course from XMLSolutions, March 2000.
Self-directed exploration of Java, XML, networking, Internet protocols (NNTP, HTTP, etc.), and scripting (Perl, Python). Selected projects:
VLSI Design semester course; Spring 1990; University of Maryland; College Park, MD.
PROFESSIONAL AFFILIATIONS, ACTIVITIES, AND PUBLICATIONS:
Technical editor/reviewer of Core J2EE Patterns, by Alur, Krupi, and Malks.
Active participant in IEEE VHDL language standardization and maintenance committee (1987 - 1997).
Institute of Electrical and Electronics Engineers (IEEE).
"A Kernel-Level VHDL Simulation Interface," presented at spring VHDL International User Forum (VIUF), 1990.
"A Heuristic Chip-Level Test Generation Algorithm," Daniel Barclay and James Armstrong, Proceedings of 23rd Design Automation Conference, 1986.
OTHER SKILLS:
Conversational Spanish.
Past Programming Languages: Pascal, ProLog, FORTRAN, PL/M, PL/1, COBOL, BASIC, assembler (microprocessors, VAX, IBM 370), APL.
| L2003-02-03hpu |